40g/100g Dp-qpsk Coherent Receiver

NEON photonicsa 40G/100G DP-QPSK Coherent Receiver integrated a silica-based DP-QPSK demodulator PLC chip, high speed balanced PD and dual TIAs in an OIF compliant compact package. A DP-QPSK demodulator integrated with two PBSs and two 90o optical hybrid in a single chip is purely passive using silica-based PLC technology.

High speed balanced waveguide PD integrated with a SSC is tolerant of coupling to the DP-QPSK demodulator and has easily achieved hybrid integration using chip-to-chip bonding technology. It is available for 100GbE ROSA and Optical Channel Monitor.

2. Feature
1) 100Gb/s & 40 Gb/s DP-QPSK
Integrated DP-QPSK Coherent receiver functionality in a single package.
- PBS(Polarization Beam Splitter)
- 90A optical hybrids
- high speed BPD(Balanced Photo detectors)
Selectable AGC or manual control
Baud rate up to 32GBd (40Gb/s : 13GBd)
Operating temperature: -5 oC to +80 oC
No active temperature control required.
Package electro-mechanical conforms with OIF-DPC-RX-01.0

3. Application
Backbone aggregation to replace N*10 G LAG
Data center network aggregation and enterprise computing
Convergence of Transport and Ethernet at 100G-Eghernet transport