Surface Mount Technology Association

Is it profitable to buy a new chip shooter that improves cycle time by 2 seconds? Will a solder paste that costs 2 cents more per gram pay for itself if its better response to pause saves 30 minutes of assembly time per shift? Is a more expensive flexible placer with less downtime a better deal than a cheaper one that is down a few percent more of the time? Or, is a $100,000 effort to improve uptime by 10% worth it? These and other questions can be answered quickly if an assembly line or factory is cost modeled. This workshop will teach the students how to cost model their assembly line or factory to answer these and other questions. The cost modeling will be performed using ProfitPro3.4 software, which will be provided free of charge. The students may keep the software after the class. Numerous case studies will be carried out to teach the students the details of cost modeling.

The advent and ongoing evolution of internet-enabled mobile devices has continued to drive innovations in the manufacturing and design of technology capable of high-frequency/high-density electronic signal transfer. The combined requirements for both fast, always-on data transmission, and small geometric form-factors can be difficult to satisfy without compromised performance and signal loss.     Selection of materials used in PCB manufacturing is critical for optimum performance of the electronic assembly. Among the primary factors affecting the integrity of high frequency signals is the surface finish applied on PCB copper pads – a need commonly met by technology manufacturers through the electroless nickel immersion gold process, ENIG. However, a well-documented limitation of ENIG is its insertion loss due to the inferior conductivity of nickel over copper, leading to higher conductor losses. Additionally, nickel’s ferromagnetic properties adversely affect circuit performance. The result is an overall reduced performance in high-frequency data transfer rate for ENIG-applied electronics, compared to bare copper.

This tutorial will focus on the main issues of testing today which consist of (a) disciplines of testing the bareboard, (b) testing on the production line for minimum ppm defects, (c) testing for fault detection/fault isolation on the production line using ICT, flying probe and vision for correcting the processes. Finally, at the system level static and dynamic functional test is performed using embedded firmware, boundary SCAN and functional test equipment. However, the reliability of the end item is predicated on strategic testing of all items that defines the system performance.

Product developers looking for higher functionality and reach their performance and miniaturization goals are relying more on higher density semiconductor package innovations. Although integrating several semiconductor functions onto a single die element (System-on-Chip) appears to provide a viable solution for some, development cost and time has often proved to be excessive. For that reason, many manufacturers will rely heavily on more innovative IC package solutions, often integrating a number of already proven functional elements within a single-package outline.

 This capability has been stimulated by the rapid deployment of new semiconductor packaging innovations from a broad number of domestic and offshore competing companies’ that understand that new product time-to-market can be the difference between leading and following.

 This tutorial addresses the PCB design and assembly challenges for developing and implementing a broad range of high-density semiconductor package methodologies including flip-chip and array configured, multiple function 3D System-in-Package (SiP) technologies

We all want to live lives that matter, but just how do we make a positive difference? Some believe that you must have an impressive title to do so, but that is a mistake. The best leaders recognize that no matter where you are in the organization, you have influence - and intentionally using that influence to make a positive difference makes you a leader. This is a highly engaging and powerful session on leadership, breaking this complicated subject down into four simple components: A heart that cares, a head that connects, hands that collaborate, and feet that show courage. Whatever your vocation or aspiration, master these four and watch your influence lead to a greater positive impact in the lives of others - at home, at work, and in every other area of life.

Learning Outcomes: Participants will be able to…

• identify why influence is important and how we need to be intentional in its growth.
• describe the four components of developing influence with anyone.
• list and explain how they can apply the tools of influence into their daily lives

The removal of ionic residues from post-reflow circuit assemblies is a widely accepted method to improve reliability. Today’s Circuit assemblies are vastly different from those of the past. Higher reflow temperatures, smaller and more densely populated components, bottom terminated components, and the increased volume of circuit assemblies placed into harsh environments have all contributed to the decline of residue tolerance on an assembly. The fact is modern circuit assemblies can tolerate far less residues than assemblies of the past.     

Adding to these facts is IPC’s new and more stringent cleanliness quantification requirements requiring new objective evidence and process monitoring standards. Cleaning and cleanliness quantification techniques and processes have changed so much in recent years.   

 Today’s products are more connected than ever before. Modern electronic assemblies are expected to operate reliability in harsh environments, something that is becoming more difficult to achieve when residues are left on an assembly. With IOT, the increasing electrification of automobiles, connected factories, and so many other factors, now more than ever the removal of problematic residues is so important to ensuring the reliability of circuit assemblies and the products they’re installed in.